Fabrication and Characterization of 150-mm Silicon-on-Polycrystalline Silicon Carbide Substrates

Silicon-on-insulator (SOI) substrates can reduce radiofrequency (RF) substrate losses due to their buried oxide (BOX). On the other hand, the BOX causes problems since it acts as a thermal barrier. Oxide has low thermal conductivity and traps heat generated by devices on the SOI. This paper presents a hybrid substrate which uses a thin layer of polycrystalline silicon and polycrystalline silicon carbide (Si-on-poly-SiC) to replace the thermally unfavorable BOX and the silicon substrate. Substrates of 150 mm were fabricated by wafer bonding and shown to be stress and strain free. Various electronic devices and test structures were processed on the hybrid substrate as well as on a low-resistivity SOI reference wafer. The substrates were characterized electrically and thermally and compared with each other. Results showed that the Si-on-poly-SiC wafer had 2.5 times lower thermal resistance and exhibited equal or better electrical performance compared with the SOI reference wafer.