High sensitivity, ultra-wide band divide-by-two circuit with frequency self-adaptive techniques

被引:0
|
作者
Mei, N. -S. [1 ]
Fu, J. [1 ]
Hao, S. -L. [1 ]
Huang, Y. -M. [1 ]
Hong, Z. -L. [1 ]
机构
[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China
关键词
Divide-by-two; Phase-locked loop; Toggle flip-flop; Frequency-voltage converter;
D O I
10.1007/s10470-011-9761-z
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A high sensitivity, ultra wide-band toggle flip-flip divide-by-two circuit is presented in this study. Frequency self-adaptive load technique is proposed to increase the divider's operating frequency range and sensitivity. Furthermore, the circuits operation principle and theory are analysized in detail. Measurement results exhibits that the proposed divider's input sensitivity is enhanced, the operating frequency ranges from 150-MHz to 16.734-GHz, and the power consumption is 15 mW when input frequency is 16.734-GHz. The chip is implemented on a standard 0.13 mu m CMOS process with 1.2 V supply voltage.
引用
收藏
页码:131 / 136
页数:6
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