FPGA Implementation of Optimized Karhunen-Loeve Transform for Image Processing Applications

被引:7
|
作者
Bhairannawar, Satish S. [1 ]
Sarkar, Sayantam [2 ]
Raja, K. B. [3 ]
机构
[1] SDM Coll Engn & Technol, Dept Elect & Commun Engn, Dharwad, Karnataka, India
[2] Vijaya Vittala Inst Technol, Dept Elect & Commun Engn, Bangalore, Karnataka, India
[3] Univ Visvesvaraya Coll Engn, Dept Elect & Commun Engn, Bangalore, Karnataka, India
关键词
Modified divider architecture; Optimized square root architecture; Error correction; Optimized Karhunen-Loeve Transform (O-KLT)Architecture; FPGA implementation; HARDWARE ALGORITHM; KL;
D O I
10.1007/s11554-018-0776-x
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The various transformation techniques play vital role in the field of Digital Image Processing. In this paper, we propose FPGA implementation of optimized Karhunen-Loeve transform for image processing applications. The Data Format Conversion block is introduced to represent the input data to suitable format and are fed to the Covariance computation block to calculate corresponding covariance values with accuracy. The Optimized Square Root block has been designed in the Eigenvalue computation block to obtain eigenvalues which are in turn fed to the Eigenvector computation block to produce eigenvectors using Modified divider. Further the Karhunen-Loeve Transformed matrix of the input data is obtained by performing multiplication of eigenvectors with covariance values in the matrix multiplication block. The errors are introduced due to fixed point binary calculations and are minimized by novel Error correction block. The proposed architecture is tested on Sparan-6 (XC6SLX45-3CSG324) FPGA board. The performance of the architecture is compared with respect to hardware utilization and accuracy of various existing techniques to prove the efficiency.
引用
收藏
页码:357 / 370
页数:14
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