DAD-FF: Hardening Designs by Delay-Adjustable D-Flip-Flop for Soft-Error-Rate Reduction

被引:19
|
作者
Lin, Dave Y. -W. [1 ]
Wen, Charles H. -P. [1 ]
机构
[1] Natl Chiao Tung Univ, Dept Elect & Comp Engn, Hsinchu 300, Taiwan
关键词
Characterization; design flow; flip-flops; heavy ion; radiation hardening; semiconductor device modeling; singleevent transient (SET); soft error; technology computer-aided design (TCAD) simulation; ROBUST SYSTEM-DESIGN; CHARGE COLLECTION; UPSET; SIMULATION; LATCH;
D O I
10.1109/TVLSI.2019.2962080
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
For the safety-critical applications such as biomedical and automobile electronics, the system failure induced by soft errors becomes a major issue of reliability. However, most of the commercial cell libraries do not include radiation-hardened components to build a safety-critical design. Therefore, a delay-adjustable D-flip-flop (DAD-FF) is proposed together with a design flow to construct a radiation-hardened system by automation. To enable such radiation-hardened design into the current design flow, DAD-FF is characterized as a general cell and compiled as a patch in the NanGate FreePDK45 bulk 45-nm open cell library, as an example. The experimental results show that DAD-FF is capable of reducing 1.3 x 10(10)X soft errors with respect to the standard flip-flop (STD-FF) and resisting over 99.999997% strikes of heavy ions. Meanwhile, four radiation-hardened benchmark circuits are synthesized with DAD-FF cell, and further used to prove the effectiveness against soft errors compared to a prior work, built-in soft-error resilience (BISER), with 18% area and 40% timing improvement. To sum up, DADFF is elaborated from the modeling at the device- level to the validation at the system-level and exhibits its strong robustness to soft errors.
引用
收藏
页码:1030 / 1042
页数:13
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