Verifying formal specifications using fault tree analysis

被引:0
|
作者
Liu, SY [1 ]
机构
[1] Hosei Univ, Fac Comp & Informat Sci, Tokyo, Japan
关键词
D O I
暂无
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Specification before implementation has been suggested as a sensible approach to software evolution. The quality of this approach may be improved by using formal specification. However, to serve as a trustable foundation for implementation and to help reduce the cost in program testing, the formal specification must be ensured to be satisfiable, consistent, complete, and accurate in recording the user requirements. In this paper we first define those four concepts and then introduce a technique for verifying formal specifications that combines the fault tree analysis with static analysis and testing techniques.
引用
收藏
页码:272 / 281
页数:2
相关论文
共 50 条
  • [1] Verifying timing consistency in formal specifications
    Bartos, T
    Fristacky, N
    IEEE DESIGN & TEST OF COMPUTERS, 1996, 13 (01): : 8 - 15
  • [2] Verifying consistency and validity of formal specifications by testing
    Liu, SY
    FM'99-FORMAL METHODS, 1999, 1708 : 896 - 914
  • [3] A Software Fault Tree Analysis Technique for Formal Requirement Specifications of Nuclear Reactor Protection Systems
    Jung, Sejin
    Yoo, Junbeom
    Lee, Young-Jun
    RELIABILITY ENGINEERING & SYSTEM SAFETY, 2020, 203
  • [4] Towards Formal Fault Tree Analysis Using Theorem Proving
    Ahmed, Waqar
    Hasan, Osman
    INTELLIGENT COMPUTER MATHEMATICS, CICM 2015, 2015, 9150 : 39 - 54
  • [5] Formal Static Fault Tree Analysis
    Xiang, Jianwen
    Yanoo, Kazuo
    ICCES'2010: THE 2010 INTERNATIONAL CONFERENCE ON COMPUTER ENGINEERING & SYSTEMS, 2010, : 280 - 286
  • [6] Descartes-Agent: Verifying Formal Specifications Using the Model Checking Technique
    Subburaj, Vinitha Hannah
    Urban, Joseph E.
    2018 SECOND IEEE INTERNATIONAL CONFERENCE ON ROBOTIC COMPUTING (IRC), 2018, : 392 - 398
  • [7] A Framework for Verifying the Conformance of Design to Its Formal Specifications
    Dieu-Huong Vu
    Chiba, Yuki
    Yatake, Kenro
    Aoki, Toshiaki
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2015, E98D (06): : 1137 - 1149
  • [8] Formal Fault Tree Analysis - Practical Experiences
    Ortmeier, Frank
    Schellhorn, Gerhard
    ELECTRONIC NOTES IN THEORETICAL COMPUTER SCIENCE, 2007, 185 (SPEC. ISS.) : 139 - 151
  • [9] An automated rigorous review method for verifying and validating formal specifications
    Liu, SY
    AUTOMATED TECHNOLOGY FOR VERIFICATION AND ANALYSIS, PROCEEDINGS, 2004, 3299 : 15 - 19
  • [10] Formal fault tree construction and system safety analysis
    Xiang, JW
    Futatsugi, K
    He, YX
    PROCEEDINGS OF THE IASTED INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING, 2004, : 378 - 384