High Resolution CMOS Voltage Comparator for High Speed SAR ADCs

By means of a standard 0.18 mu m CMOS process a novel CMOS voltage comparator circuit has been proposed which is capable of resolving 400 mu V. Employing preamplifier latch structure the designed circuit operates at the clock frequency of 100MHz. The main advantage of the implemented comparator is its 11 bit resolution which makes it a good choice for high resolution SAR ADCs. In order to reduce the power consumption some modifications are made to the conventional structure of the comparator which resulted in reduction of employed transistors as well as active area on chip. Post-layout simulation results confirm the correct behavior of the proposed architecture while the power dissipation is 900 mu W from a 1.8V power supply.