A 139 nW, 67 ppm/°C BJT-CMOS-Based Voltage Reference Circuit

被引:0
|
作者
Chouhan, Shailesh Singh [1 ]
Halonen, Kari [1 ]
机构
[1] Aalto Univ, Sch Elect Engn, Dept Micro & Nanosci, Espoo, Finland
关键词
Low power; Voltage reference; IoT; Energy harvesting; BJT; CMOS; BANDGAP REFERENCE;
D O I
10.1007/s00034-017-0641-3
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work, a low-power voltage reference circuit has been developed using the principle that a thermal compensation of the threshold voltage of a diode-connected nMOSFET can be obtained by using the PTAT current. The proposed circuit is designed using 0.18 mu m standard CMOS technology for the industrial temperature range of -40 to +85 degrees C. The measurements have been done over a set of 10 samples in the given temperature range. The measured results show that the proposed circuit is capable of working in the supply voltage range of 1.2-1.8 V with the mean line sensitivity and total current consumption of 0.64%/V and 115.4 nA, respectively, at 22.5 degrees C. The measured mean reference voltage obtained from the circuit is 435 mV with the mean temperature coefficient of 67 ppm/degrees C. The measured noise density at 22.5 degrees C without any filtering capacitor is 42 mu V/root Hz at 100 Hz. The active area of the circuit is 0.01008 mm(2).
引用
收藏
页码:5062 / 5078
页数:17
相关论文
共 50 条
  • [1] A 300 nW, 7 ppm/°C CMOS Voltage Reference Circuit based on Subthreshold MOSFETs
    Ueno, Ken
    Hirose, Tetsuya
    Asai, Tetsuya
    Amemiya, Yoshihito
    PROCEEDINGS OF THE ASP-DAC 2009: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2009, 2009, : 95 - +
  • [3] A 300 nW, 15 ppm/°C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs
    Ueno, Ken
    Hirose, Tetsuya
    Asai, Tetsuya
    Amemiya, Yoshihito
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (07) : 2047 - 2054
  • [4] A 0.5-nW 29ppm/°C Voltage Reference Circuit
    Zhuang, Haoyu
    Tang, He
    Peng, Xizhu
    Zhu, Zhangming
    2018 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2018), 2018, : 107 - 110
  • [5] A 1 V supply 10.3 ppm/°C 59 nW subthreshold CMOS voltage reference
    Cheng, Tiedong
    Gong, Xinlv
    MICROELECTRONICS JOURNAL, 2024, 152
  • [6] A Higher Order Curvature Corrected 2 ppm/°C CMOS Voltage Reference Circuit
    Palaniappan, Arjun Ramaswami
    Maurath, Dominic
    Kalathiparamhil, Felix
    Sick, Liter
    2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, : 505 - 508
  • [7] A 600 nA, 0.7 ppm/°C CMOS Voltage Reference Circuit without Resistors
    Imbrea, Damian
    Cojan, Neculai
    Bonteanu, Gabriel
    2011 10TH INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS (ISSCS), 2011,
  • [8] A 1.65-nW 11.14-ppm/°C self-biased subthreshold CMOS voltage reference with temperature compensation circuit
    Huang, Yuxuan
    Liu, Jingjing
    Yan, Feng
    Wang, Yuchen
    Sun, Kangkang
    Ge, Weijie
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2024, 52 (12) : 5989 - 6000
  • [9] A 0.7-V 7.4-nW 6.4-ppm/°C CMOS Subthreshold Voltage Reference With Temperature Compensation Circuit
    Liu, Jingjing
    Huang, Yuxuan
    Wang, Yuchen
    Guan, Jian
    Li, Zhipeng
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2024,
  • [10] A 2.69-ppm/°C curvature-compensated BJT-based bandgap voltage reference
    Rashidian, Hamidreza
    Soltani, Iman
    Maghsoudi, Mohammad
    INTEGRATION-THE VLSI JOURNAL, 2025, 102