Operational Transconductance Amplifier With Class-B Slew-Rate Boosting for Fast High-Performance Switched-Capacitor Circuits

被引:25
|
作者
Naderi, Mohammad H. [1 ]
Prakash, Suraj [1 ]
Silva-Martinez, Jose [1 ]
机构
[1] Texas A&M Univ, Dept Elect & Comp Engn, College Stn, TX 77843 USA
基金
美国国家科学基金会;
关键词
Slew rate boosting; switched-capacitor circuits; class B; linear settling; and high speed pipelined ADC; RATE ENHANCEMENT; FOLDED-CASCODE; NOISE; COMPENSATION; MODULATOR; FILTER; TIME; LOAD;
D O I
10.1109/TCSI.2018.2852273
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a technique for slew-rate (SR) boosting suitable for switched-capacitor circuits is proposed. The proposed technique makes use of a class-B auxiliary amplifier that generates a compensating current only when high SR is demanded by large signals. The proposed architecture employs simple circuitry to detect the need for a large output current by employing a highly sensitive pre-amplifier followed by a class-B amplifier. The functionality of the class-B transconductance amplifier is dictated by a predefined hysteresis, and operates in parallel with the main amplifier. The proposed solution demands small static power (under 20% of main amplifier power) due to its class-B nature. The experimental results in a 40-nm CMOS technology show more than 45% reduction in slew time, and a 28% shorter slew time for 1% settling time when used in a typical 4.5 bit/stage block commonly used in pipelined analog-to-digital converters. Compared with the core amplifier, HD3 at 500 MHz reduces by more than 10 dB when the SR boosting circuit is activated.
引用
收藏
页码:3769 / 3779
页数:11
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