Vulnerability Detection and Error Minimization in Bioassay Sample Mixing and Droplet Routing for Digital Microfluidic Biochips

被引:0
|
作者
Singh, Ankita [1 ]
Samanta, Tuhina [1 ]
机构
[1] Indian Inst Engn Sci & Technol, Dept Informat Technol, Howrah 711103, W Bengal, India
关键词
Concurrent Execution; Digital Microfluidic Biochip; Golden Execution Time; Attacks; Error Minimization; ON-A-CHIP; DESIGN;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Errors may be intruded in various assay operations because of parametric and physical defects of a biochip, or through undesired external manipulation of the assay operation. In this paper, an approach for error detection and minimization for digital microfluidic biochip is described. Some pathological samples and their corresponding sequence models are chosen as standards to propose possible routing paths/graphs on a biochip. These standard sequence graphs are considered as Golden Execution Models, and any deviation from these models is detected as error. Three possible error models are proposed guided by the fluidic and parametric constraints of the droplet routing. Our aim is to detect any possible error, followed by minimization of these errors. The proposed heuristic tries to minimize (i) electrode usages, (ii) sample execution time/routing time, and (iii) error overhead in subsequent phases of droplet routing. Proposed model is executed on some recent benchmarks and experimental analysis is quite encouraging. The method results in error free routing paths for different bio-assays on account of nominal increase in execution time.
引用
收藏
页码:66 / 71
页数:6
相关论文
共 50 条
  • [1] Droplet routing in the synthesis of digital microfluidic biochips
    Su, Fei
    Hwang, William
    Chakrabarty, Krishnendu
    2006 DESIGN AUTOMATION AND TEST IN EUROPE, VOLS 1-3, PROCEEDINGS, 2006, : 321 - +
  • [2] Virtual Droplet Routing Algorithm for Digital Microfluidic Biochips
    Jaluka, Vivek
    Rajesh, Kolluri
    Pyne, Sumanta
    2020 24TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2020,
  • [3] Reactant Minimization in Sample Preparation on Digital Microfluidic Biochips
    Liu, Chia-Hung
    Chiang, Ting-Wei
    Huang, Juinn-Dar
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2015, 34 (09) : 1429 - 1440
  • [4] PCB Escape Routing and Layer Minimization for Digital Microfluidic Biochips
    McDaniel, Jeffrey
    Zimmerman, Zachary
    Grissom, Daniel
    Brisk, Philip
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2017, 36 (01) : 69 - 82
  • [5] Reactant Minimization during Sample Preparation on Digital Microfluidic Biochips using Skewed Mixing Trees
    Huang, Juinn-Dar
    Liu, Chia-Hung
    Chiang, Ting-Wei
    2012 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 2012, : 377 - 383
  • [6] Reactant Minimization for Sample Preparation on Microfluidic Biochips With Various Mixing Models
    Liu, Chia-Hung
    Shen, Kuo-Cheng
    Huang, Juinn-Dar
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2015, 34 (12) : 1918 - 1927
  • [7] Integrated Droplet Routing and Defect Tolerance in the Synthesis of Digital Microfluidic Biochips
    Xu, Tao
    Chakrabarty, Krishnendu
    ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 2008, 4 (03)
  • [8] Cross-Contamination Avoidance for Droplet Routing in Digital Microfluidic Biochips
    Zhao, Yang
    Chakrabarty, Krishnendu
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2012, 31 (06) : 817 - 830
  • [9] A Contamination Aware Droplet Routing Algorithm for the Synthesis of Digital Microfluidic Biochips
    Huang, Tsung-Wei
    Lin, Chun-Hsien
    Ho, Tsung-Yi
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2010, 29 (11) : 1682 - 1695
  • [10] Reinforcement Learning based Droplet Routing Algorithm for Digital Microfluidic Biochips
    Rajesh, Kolluri
    Tirkey, Anand
    Sarkar, Anirban
    Pyne, Sumanta
    2020 24TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2020,