CARIOCA -: A fast binary front-end implemented in 0.25μm CMOS using a novel current-mode technique for the LHCb muon detector

被引：0
|
作者：
Moraes, D [1 ]
Anghinolfi, F [1 ]
Deval, P [1 ]
Jarron, P [1 ]
Riegler, W [1 ]
Rivetti, A [1 ]
Schmidt, B [1 ]
机构：
[1] UFRJ, IF, LAPE, BR-21945970 Rio De Janeiro, Brazil
来源：
PROCEEDINGS OF THE SIXTH WORKSHOP ON ELECTRONICS FOR LHC EXPERIMENTS | 2000年 / 2000卷 / 10期
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暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The CARIOCA front-end is an amplifier discriminator chip, using 0.25 mum CMOS technology, developed with a very fast and low noise preamplifier. This prototype was designed to have input impedance below 10 Omega. Measurements showed a peaking time of 14ns and noise of 450e at zero input capacitance, with a noise slope of 37.4 e/pF. The sensitivity of 8mV/fC remains almost unchanged up to a detector capacitance of 120pF.
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页码：192 / 195
页数：4
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