An Instructional Processor Design using VHDL and an FPGA

被引:0
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作者
Hayne, Ronald J. [1 ]
机构
[1] The Citadel, Dept Elect & Comp Engn, Charleston, SC 29409 USA
关键词
D O I
暂无
中图分类号
G40 [教育学];
学科分类号
040101 ; 120403 ;
摘要
Most modern processors are too complex to be used as an introductory design example. Many digital design courses and texts use hardware description language models of processors, but they are often ad hoc. What is needed is a basic processor with sufficient complexity, that can be modified, programmed, and tested. An instructional processor has been developed for use as a design example in an Advanced Digital Systems course. The architecture is separated into teachable subsets. The data path contains the registers and interconnecting busses, while the controller implements the fetch, decode, and execute sequences. The VHDL model of the system can be simulated to demonstrate operation of the processor. The instructional processor is now in its second iteration with an updated controller design and a new microcontroller extension. Results from student homework assignments indicate that they are able to successfully design modifications to the processor and demonstrate their function via simulation. The project continues to achieve its goal as a valuable instructional tool.
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页数:10
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