Design Space Exploration of CMOS Cross-Coupled LC Oscillators via RF Circuit Synthesis

This study presents a parasitic-aware multi-objective RF circuit synthesis tool and performance space exploration of MOS cross-coupled LC oscillators using the developed tool. The developed tool utilizes SPEA-2 algorithm as a search engine, in which sophisticated sub-circuit models for passive devices are included; thus, the effect of layout-induced parasitics are considered during the optimization and the discrepancy between the circuit level and the layout level is minimized. As the case study, performance spaces of three different CMOS cross-coupled oscillators (NMOS, PMOS, and CMOS) are explored and compared. Moreover, a further analysis is performed to demonstrate the effect of noise shaping capacitor on the oscillator performance.