FPGA-Implementation of Parallel and Sequential Architectures for Adaptive Noise Cancelation

被引：27

作者：

Bahoura, Mohammed ^{[1
]}

Ezzaidi, Hassan ^{[2
]}

机构：

[1] Univ Quebec, Dept Engn, Rimouski, PQ G5L 3A1, Canada

[2] Univ Quebec Chicoutimi, Dept Appl Sci, Chicoutimi, PQ G7H 2B1, Canada

来源：

CIRCUITS SYSTEMS AND SIGNAL PROCESSING | 2011年 / 30卷 / 06期

关键词：

Adaptive noise canceller; Sequential adaptive filter; Delayed LMS algorithm; Pipelined architecture; FPGA; ECG;

D O I：

10.1007/s00034-011-9310-0

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a FPGA-based rapid prototyping of an adaptive noise canceller (ANC) using XUP Virtex-II Pro development board and Xilinx System Generator. New parallel and sequential architectures of the ANC are proposed and successfully applied to remove noise from electrocardiogram and speech signals. The pipelined architecture were evaluated and compared to existing high-speed systems using objective measurement tests. By providing comparable filtering performances that of the parallel architectures, the proposed sequential system required fewer material resources.

引用

页码：1521 / 1548

页数：28

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