A High-Speed Serial Data Acquisition Scheme Based on Nios II

被引：0

作者：

Zhang, Wei ^{[1
]}

Shen, Jun ^{[1
]}

机构：

[1] Beijing Inst Technol, Beijing 100081, Peoples R China

来源：

2011 INTERNATIONAL CONFERENCE ON ELECTRONICS, COMMUNICATIONS AND CONTROL (ICECC) | 2011年

关键词：

serial data acquisition; FPGA; Nios II;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper proposes a high speed serial data acquisition scheme.The scheme adopts Nios II soft processor in FPGA instead of application of specific chips in digital system to realize and control serial data acquisition,and especially focuses on the hardware designment with Quartus II and software development with Nios II EDS. This design shortens the design processs,simplifies the circuits,and increases data reliability. Simulation and testing results show that the data receiving is accurate,which verifies the validity of the design.

引用

页码：2417 / 2420

页数：4

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