30V new fine trench MOSFET with ultra low on-resistance

被引:17
|
作者
Ono, S [1 ]
Kawaguchi, Y [1 ]
Nakagawa, A [1 ]
机构
[1] Toshiba Co Ltd, Semicond Co, Adv Discrete Semicond Technol Lab, Discrete Semicond Div,Saiwai Ku, Kawasaki, Kanagawa 2128583, Japan
关键词
D O I
10.1109/ISPSD.2003.1225223
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The present paper proposes a new ultra low on-resistance trench MOSFET. The proposed device is characterized by the narrow high resistance n-epi layer between the two trench gates and the thin n-drift layer, which lies between the trench bottom and the n(+) substrate. The high resistance n-epi between the trenches is always depleted because of the built-in potential of the p(+) gate poly, resulting in the normally-off characteristics without p-base. The thin n-drift layer enables the use of thin gate oxide. The optimum doping concentration and thickness of the n-drift is chosen so that the on-resistance is minimized. The proposed trench MOSFET experimentally achieved a 33(V) drain-source blocking voltage and a 10mOmegamm(2) specific on-resistance at Vgs=10V. This is the lowest Ron value ever reported.
引用
收藏
页码:28 / 31
页数:4
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