A Pipelined Memory-Efficient Architecture for Face Detection and Tracking on a Multicore Environment

被引:0
|
作者
Sudha, N. [1 ]
Chandrahas, Bharat [2 ]
机构
[1] XMOS Semicond India Pvt Ltd, Madras, Tamil Nadu, India
[2] Indian Inst Technol, Madras, Tamil Nadu, India
关键词
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this extended abstract, we propose a pipelined parallel architecture for face detection that is appropriate for implementation on a multicore environment. The architecture comprises of modules for video frame acquisition, skin pixel detection, binarization, morphological operations and connected component analysis operating in sequence on an image frame. Successive lines of a frame are processed in a pipeline on multicores. Embedded system realization on a multicore XMOS microcontroller runs the drivers for interfacing image sensor and LCD on different cores along with the various stages of the image processing pipeline. The realization achieves a frame rate of 8 frames/second for an image size of 480 x 272. Further, the solution is area-efficient and is based on a single XMOS sliceKIT with support for camera, LCD and other units.
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页数:2
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