Variations in timing and leakage power of 45nm library cells due to lithography and stress effects

被引：1

作者：

Sadra, Kayvan ^{[1
]}

Terry, Mark ^{[1
]}

Rajagopal, Arjun ^{[1
]}

Soper, Robert A. ^{[1
]}

Kolarik, Donald ^{[1
]}

Aton, Tom ^{[1
]}

Hornung, Brian ^{[1
]}

Khamankar, Rajesh ^{[1
]}

Hurat, Philippe ^{[1
]}

Kasthuri, Bala ^{[1
]}

Ran, Yajun ^{[1
]}

Verghese, Nishath ^{[1
]}

机构：

[1] Texas Instruments Inc, 12500 TI Blvd, Dallas, TX 75243 USA

来源：

DESIGN FOR MANUFACTURABILITY THROUGH DESIGN-PROCESS INTEGRATION III | 2009年 / 7275卷

关键词：

variations; timing; leakage power; library; DFM; LEA; context dependence; stress;

D O I：

10.1117/12.816485

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

We have conducted a study of context-dependent variability for cells in a 45nm library, including both lithography and stress effects, using the Cadence Litho Electrical Analyzer (LEA) software. Here, we present sample data and address a number of questions that arise in such simulations. These questions include identification of stress effects causing context dependence, impact of the number of contexts on the results, and combining lithography-induced variations due to overlay error with context-dependent variations. Results of such simulations can be used to drive a number of corrective and adaptive actions, among them layout modification, cell placement restrictions, or optimal design margin determination.

引用

页数：10

共 12 条

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