On Electrical Modeling of Imperfect Diffusion Patterning

Imperfect lithographic patterning leads to non-rectangular polysdicon and diffusion layers Though electrical modeling of polysilicon rounding has received much attention, same is not true for diffusion In this work, we propose the first physically derived electrical model for diffusion rounding We show that channel length, effective device width and V-th of the device are affected The model shows that effect of rounding is not symmetric with respect to source and drain Further, we extend the model to handle polysilicon and diffusion patterning imperfections together The model can be calibrated using circuit simulation instead of silicon/TCAD The average errors (as verified with TCAD simulation) of the model are 1 6% and 1 7% for TCAD and SPICE based calibration respectively The average error for the combined poly and diffusion rounding model is 2 7% As a simple circuit application, we show that poly-to-diffusion spacing rule can be shrunk to reduce cell area by 5% without any delay or leakage penalty