Fractional Order Sinusoidal Oscillator Using only a Single Operational Trans-resistance Amplifier

被引:0
|
作者
Kumar, Manoj [1 ]
Bhaskar, D. R. [1 ]
Kumar, Pragati [1 ]
机构
[1] Delhi Technol Univ, Dept Elect Engn, Delhi 110042, India
关键词
Analog signals processing; Fractional capacitor; Fractional order analog circuit; Fractional order oscillator; Operational trans-resistance amplifier; DESIGN;
D O I
10.1109/ICCCIS51004.2021.9397101
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
In this paper a fractional order sinusoidal oscillator (FSO) implemented with two fractional capacitors (FC), four resistors and a single operational trans-resistance amplifier (OTRA) has been presented. The characteristic equation of proposed fractional order oscillator has been derived using nodal analysis and the expressions for frequency of oscillation, condition of oscillation and phase difference between the output voltages are obtained. In one special case, when alpha = beta = 1.0, the circuit behaves as a classical single resistance controlled sinusoidal oscillator (SRCO) in which the frequency of oscillation and the condition of oscillation can be varied through separate resistors. These properties are retained even when the value of alpha and beta lie in the range of 0 < alpha, beta < 1. Since the input terminals of OTRA are at virtually ground, the proposed oscillator circuit is also insensitive to parasitic input capacitances and input resistances. The workability of proposed structure has been verified with PSPICE simulation results using a single OTRA (constructed with CMOS transistors using TMSC 0.18 mu m technology) and fractional capacitors realized using the method proposed by Valsa and Dovrak and Friedl.
引用
收藏
页码:856 / 861
页数:6
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