A multi-phase self-sensing clock generator for hybrid DPWM application

被引:4
|
作者
Chen, Hua [1 ]
Li, Shun [1 ]
Niu, Qi [1 ]
Wu, Yipin [1 ]
Zhou, Feng [1 ]
机构
[1] Fudan Univ, ASCI & Syst State Key Lab, Shanghai 201203, Peoples R China
来源
ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS | 2007年
关键词
VCO; hybrid DPWM; temperature and process compensation;
D O I
10.1109/ICASIC.2007.4415711
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the design of a multiphase self-sensing clock generator and its application in a hybrid digital pulse-width modulator (DPWM). Based on a voltage controlled ring oscillator (VCO), the clock generator has its control voltage generated from a self-sensing circuit which uses a new enhanced circuit to compensate temperature and process variation. Its application in a hybrid DPWM could effectively reduce the required bits of counter. Simulation results show its frequency reaches l57.7MHz while the worst variation, across a temperature range of 0 degrees C to 100 degrees C under each process corner, is only +/- 5.7%. Besides, it reduces the required clock frequency for a 6-bit hybrid DPWM from 2.52GHz to only 157.7MHz.
引用
收藏
页码:635 / 638
页数:4
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