A 60ns 500 x 12 0.35μm CMOS low-power scanning read-out IC for cryogenic infra-red sensors

This paper proposes a low-cost scanning read-out IC architecture for large arrays of infra-red photon sensors operating at cryogenic temperatures. The low-power and compact 50 mu m x 100 mu m active pixel sensor area is achieved by the use of novel CMOS basic building blocks for single-capacitor integration and correlated double sampling, embedded pixel-test, pixel charge-multiplexing, video multiplexing and offset calibration. As a result, a low-cost 500x12 and 60ns/pixel system-on-chip realization, capable of capturing high-resolution and real-time infra-red images like 640x500@100fps or 2560x500@25fps, is presented for a standard 0.35 mu m CMOS technology.