The Vulnerability Analysis of Design-for-trust Technique and Its Defense

被引:0
|
作者
Cui Xiaotong [1 ,2 ]
Qin Weirong [1 ]
Cheng Kefei [1 ]
Wu Yu [1 ]
机构
[1] Chongqing Univ Posts & Telecommun, Sch Cyber Secur & Informat Law, Chongqing 400065, Peoples R China
[2] State Key Lab Vehicle NVH & Safety Technol, Chongqing 401122, Peoples R China
关键词
Hardware Trojans(HTs); Design-for-trust; Checkpoints; Sequence extraction;
D O I
10.11999/JEIT210624
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
System-on-Chip (SoC) designers typically use third Party Intellectual Property(3PIP) cores to implement target functions. As these 3PIP cores are not trusted, the underlying SoC suffers from the threat of Hardware Trojans(HTs). As a subset of design-for-trust techniques, the diversified redundancy is promising in establishing trustworthy computings of SoCs. However, It is shown that the diversified redundancy can be defeated by HTs that explores triggering patterns. Therefore, an adapted diversified redundancy technique is proposed to defend against such kind of attacks.
引用
收藏
页码:2482 / 2488
页数:7
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