Generating all test patterns for stuck-at faults at a gate pole and their connection with the incompletely specified Boolean function of the corresponding subcircuit

被引：0

作者：

Matrosova, A. ^{[1
]}

Ostanin, S. ^{[1
]}

Kirienko, I. ^{[1
]}

机构：

[1] Tomsk State Univ, Dept Appl Math & Cybernet, Tomsk, Russia

来源：

2014 PROCEEDINGS OF THE 14TH BIENNIAL BALTIC ELECTRONICS CONFERENCE (BEC 2014) | 2014年

关键词：

stuck-at faults; test patterns; incompletely specified Boolean functions; FAILURES;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The algorithm of generating all test patterns for a stuck-at fault at a gate pole of single-output combinational circuit is suggested. It is based on the method of redefining products suggested before. It is known that a behavior of a subcircuit of a combinational circuit is presented by the incompletely specified Boolean function. It means that there are the input Boolean vectors of a circuit on which the value of the subcircuit output has no effect on the value of the circuit output. It is set up that the on-set vectors of a subcircuit incompletely specified Boolean function are represented by all test patterns for the stuck-at 0 fault at a subcircuit output and the off-set vectors are represented by all test patterns for the stuck-at 1 fault at the same output. This result may be used for structural combinational circuit mIlllmlzIllg and for partially programmable circuit design. The experimental results are presented.

引用

页码：85 / 88

页数：4

共 3 条

[1] Boolean Difference Technique for Detecting All Missing Gate and Stuck-at Faults in Reversible Circuits
Mondal, Joyati
Mondal, Bappaditya
Kole, Dipak Kumar
Rahaman, Hafizur
Das, Debesh Kumar
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2019, 28 (12)
[2] Generating Compact Test Patterns for Stuck-at Faults and Transition Faults in One ATPG Run
Kung, Yi-Cheng
Lee, Kuen-Jong
Reddy, Sudhakar M.
2018 IEEE INTERNATIONAL TEST CONFERENCE IN ASIA (ITC-ASIA 2018), 2018, : 1 - 6
[3] Generating all test patterns for a given stuck-at fault of a logical circuit and its ROBDD implementation
Matrosova, Anzhela Y.
Ostanin, Sergei A.
Bucharov, Alexander, V
Kirienko, Irina E.
VESTNIK TOMSKOGO GOSUDARSTVENNOGO UNIVERSITETA-UPRAVLENIE VYCHISLITELNAJA TEHNIKA I INFORMATIKA-TOMSK STATE UNIVERSITY JOURNAL OF CONTROL AND COMPUTER SCIENCE, 2014, 27 (02): : 82 - 89

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