MorphoSys: Case study of a reconfigurable computing system targeting multimedia applications

被引:26
|
作者
Singh, H [1 ]
Lu, GM [1 ]
Lee, MH [1 ]
Kurdahi, F [1 ]
Bagherzadeh, N [1 ]
Filho, E [1 ]
Maestre, R [1 ]
机构
[1] Univ Calif Irvine, Dept Elect & Comp Engn, Irvine, CA 92697 USA
关键词
D O I
10.1145/337292.337583
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, we present a case study for the design, programming and usage of a reconfigurable system-on-chip, MorphoSys, which is targeted at computation-intensive applications. This 2-million transistor design combines a reconfigurable array of cells with a RISC processor core and a high bandwidth memory interface. The system architecture, software tools, performance analysis and a scheduling algorithm for target applications are described.
引用
收藏
页码:573 / 578
页数:6
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