60 GHz HR SOI CMOS antenna for a System-on-Chip integration scheme targeting high data-rate kiosk applications

被引：0

作者：

Pilard, R. ^{[1
]}

Gianesello, F. ^{[1
]}

Gloria, D. ^{[1
]}

Titz, D. ^{[2
]}

Ferrero, F. ^{[2
]}

Luxey, C. ^{[2
]}

机构：

[1] STMicroelect, Technol R&D, STD, TPS Lab, 850 Rue Jean Monnet, F-38926 Crolles, France

[2] Univ Nice Sophia Antipolis, LEAT, F-06560 Valbonne, France

来源：

2011 IEEE INTERNATIONAL SYMPOSIUM ON ANTENNAS AND PROPAGATION (APSURSI) | 2011年

关键词：

component; Integrated antennas; high resistivity silicon; SOI; radiation pattern; gain;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

During past years, various research teams have been implied in the development of 60 GHz chipset solutions, using both BiCMOS or advanced CMOS technologies. But for the 60 GHz market to flourish, not only are low cost RFICs required, but also complete solution including the antenna. In order to address these issues, we review in this paper achievable antenna performance using High Resistivity (HR) Silicon on Insulator (SOI) CMOS technology, antenna design for a System-on-Chip (SoC) integration and 3D on wafer characterization. Antenna gain of 3.9 dBi @ 60 GHz has been measured making HR SOI CMOS technology a promising one targeting low cost short range high data-rate kiosk file-downloading at 60 GHz.

引用

页码：895 / 898

页数：4

共 10 条

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