Modeling of SJ-MOSFET for High-Voltage Applications with Inclusion of Carrier Dynamics during Switching

Demands for higher-voltage MOSFET application are increasing, for which a Super-Junction MOSFET, sustaining the voltages in the range of 500V, has been developed based on the trench-type structure. Due to the huge bias applied, a new leakage-current type is induced during switching, which causes a switching-power-loss increase. Creating a compact model for circuit design, which includes this additional leakage current, is the purpose of the present development. The model describes the depletion-width variation, caused during the switching-on of the device, with the use of the internal node potential, determined accurately by iteration. It is verified, that the new compact model can accurately predict the device performances for different device structures. This capability can be used for device optimization to realize low-power circuitry.