A Low Power Reconfigurable SAR ADC for CMOS MEMS Sensor

被引：0

作者：

Lin, Hao-Min ^{[1
]}

Wen, Kuei-Ann ^{[1
]}

机构：

[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan

来源：

PROCEEDINGS INTERNATIONAL SOC DESIGN CONFERENCE 2017 (ISOCC 2017) | 2017年

关键词：

SAR ADC; MEMS sensor; scaled resolution; dual voltage; segmented capacitor array;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a reconfigurable successive approximation register (SAR) Analog-to-Digital Converter (ADC) of which the resolution can be scaled from 9 to 12 bits for various inertial MEMS sensor applications. The dual supply voltage skill separating digital and analog voltage is implemented for achieving low power consumption. In addition, level shifter connects the interface between digital and analog domain. 3 bit segmented capacitor array are used to decrease the static error and glitches from MSB switching. In the provided 9 to 12 bits mode, this structure consumes 2.5, 2.8, 3.9 and 9.7 mu W and achieve 52.3, 57.7, 63.2 and 68.6 SNDR respectively, resulting in figure of merit (FoM) 148, 88.8, 66.3 and 88.4fJ/conversion-step.

引用

页码：7 / 8

页数：2

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