Improved recessed-gate structure for sub-0.1-μm-gate InP-based high electron mobility transistors

被引:59
|
作者
Suemitsu, T [1 ]
Enoki, T [1 ]
Yokoyama, H [1 ]
Ishii, Y [1 ]
机构
[1] NTT Corp, Syst Elect Labs, Atsugi, Kanagawa 24301, Japan
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | 1998年 / 37卷 / 3B期
关键词
InGaAs; InAlAs; InP; HEMT; gate length; cutoff frequency; selective etching;
D O I
10.1143/JJAP.37.1365
中图分类号
O59 [应用物理学];
学科分类号
摘要
An improved recessed-gate structure for high-performance short-gate InP-based InAlAs/InGaAs high electron mobility transistors (HEMTs) is presented. The effective gate length of the HEMTs is found to be related to the electron density in the side-etched region between the gate and the ohmic capped region. The higher electron density in the side-etched region is efficiently suppresses the effective gate length. A new gate recess process, which consists of a sequence of wet-chemical etching and Ar-plasma etching, enables us to reduce the effective gate length. The new recessed-gate structure successfully provides improved performance with high uniformity. A cutoff frequency of 300 GHz is achieved even with 0.07-mu m-gate HEMTs.
引用
收藏
页码:1365 / 1372
页数:8
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