The H1 silicon vertex detector

被引:88
|
作者
Pitzl, D
Behnke, O
Biddulph, M
Bösiger, K
Eichler, R [1 ]
Erdmann, W
Gabathuler, K
Gassner, J
Haynes, WJ
Horisberger, R
Kausch, M
Lindström, M
Niggli, H
Noyes, G
Pollet, P
Steiner, S
Streuli, S
Szeker, K
Truöl, P
机构
[1] Swiss Fed Inst Technol, Inst Particle Phys, CH-5232 Villigen, Switzerland
[2] Paul Scherrer Inst, Villigen, Switzerland
[3] Univ Zurich, Inst Phys, Zurich, Switzerland
[4] DESY, D-2000 Hamburg, Germany
[5] Rutherford Appleton Lab, Didcot OX11 0QX, Oxon, England
[6] Lund Univ, Dept Phys, Lund, Sweden
关键词
silicon vertex detector; ASIC chip;
D O I
10.1016/S0168-9002(00)00488-5
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
The design, construction and performance of the H1 silicon vertex detector is described. It consists of two cylindrical layers of double-sided, double-metal silicon sensors read out by a custom designed analog pipeline chip. The analog signals are transmitted by optical fibres to a custom-designed ADC board and are reduced on PowerPC processors. Details of the design and construction are given and performance figures from the first data-taking periods are presented. (C) 2000 Elsevier Science B.V. All rights reserved.
引用
收藏
页码:334 / 349
页数:16
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