Design and Simulation of Single Layered Logic Generator Block using Quantum Dot Cellular Automata

Quantum Dot Cellular Automata has attracted a lot of attention due to its extremely small feature size and ultra low power consumption. It is a possible alternative for transistor based technology. This paper presents the Single Layered design and construction of Logic Generator Block which generates the logic of various devices like 1-Bit comparator, 1-Bit Half Adder, 1-Bit Half Subtractor, AND gate, XOR gate, NOR gate and XNOR gate. Proposed design is cost effective and easy to fabricate due to absence of wire crossings. This block can be made more efficient by using control lines. Depending on individual value on control line, logic of individual device will be generated. QCADesigner 2.0.3 tool is used for design and simulation of Logic Generator Block.