A three-stage capacitor-less low noise LDO regulator for DCO phase noise reduction

A phase noise reduction technique is presented in a three-stage capacitor-less (CL) low dropout (LDO) regulator. This paper proposes a simple RC network that reduces the noise from both bias generation and inside the LDO. This LDO is applied to a conventional CMOS LC oscillator and achieved 3 dB reduction of phase noise at 1 MHz offset from 20 GHz output. The line and load regulations are, 90 mu V/V and 0.013 mu V/mA, and the output noise at 1 MHz is 6.6 nV/Hz${\rm{nV}}/\sqrt {{\rm{Hz}}} $.