Does high-NA EUV require tighter mask roughness specifications: a simulation study

被引:3
|
作者
Jonckheere, Rik [1 ]
Melvin, Lawrence, III [2 ]
机构
[1] IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
[2] Synopsys, 2025 NW Cornelius Pass Rd, Hillsboro, OR 97124 USA
关键词
EUV lithography; stochastic failures; EUV mask; mask specifications; mask roughness; multilayer mirror; line-edge roughness; roughening; capping layer;
D O I
10.1117/12.2643247
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In follow-up of related contributions at the past three symposium editions, our simulation study arrived at this question. As shown before, (local) mask defects and non-local mask deficiencies (NLMDs) act as triggers for increased stochastic failure probability on the EUV imaged resist pattern on wafer. Mask roughness is such an NLMD. The three types studied comprise multilayer (ML) ripple, which relates to a non-fully planar coating of the ML mask stack, mask absorber line-edge roughness and roughening of the ML. For the latter the study was restricted to roughening of the ruthenium capping layer only, which may already happen during the patterning step of the absorber during mask making. Each of the 3 roughness types is studied standalone and in combination. An alternative technique is presented that allows to define tolerance limits for mask roughness, without requiring massive, time-consuming stochastic simulations. It is based on studying how roughness-induced background light is passing through the projection optics. Our results, for anamorphic imaging at 0.55 NA, suggest the importance of limiting mask roughness beyond state-of-the-art.
引用
收藏
页数:8
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