Implementation of network systems using network processor technology: performance evaluation

被引：0
|
作者：
Vlaeminck, K [1 ]
Stevens, T [1 ]
Van De Meerssche, W [1 ]
De Turck, F [1 ]
Dhoedt, B [1 ]
Demeester, P [1 ]
机构：
[1] Univ Ghent, IMEC, Dept Informat Technol, B-9000 Ghent, Belgium
来源：
CDES '05: PROCEEDINGS OF THE 2005 INTERNATIONAL CONFERENCE ON COMPUTER DESIGN | 2005年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents the design of a network system using network processor technology. Firewall / network address (and port) translation was selected as reference application and Intel's second generation network processor (more specifically the IXP2400) as target platform. Implementation details of the service reveal some typical characteristics of network processor programming. A detailed performance analysis of the implemented services is compared to coarse analytical models and the system's bottleneck is identified, while possible solutions to alleviate this bottleneck are suggested.
引用
收藏
页码：59 / 63
页数：5
相关论文
共 50 条
  • [1] Network processor performance evaluation framework
    Shan Zheng
    Zhao Rong-cai
    Xie Kang-min
    2006 10TH INTERNATIONAL CONFERENCE ON COMMUNICATION TECHNOLOGY, VOLS 1 AND 2, PROCEEDINGS, 2006, : 451 - +
  • [2] Performance evaluation of a speculative network processor
    Foag, J
    Praxenthaler, M
    Wild, T
    HIGH PERFORMANCE COMPUTING SYSTEMS AND APPLICATIONS, 2003, : 161 - 166
  • [3] Implementation and Performance Evaluation of Network Intrusion Detection Systems
    Saber, Mohammed
    Ghaouth Belkasmi, Mohammed
    Chadli, Sara
    Emharraf, Mohamed
    UBIQUITOUS NETWORKING, UNET 2017, 2017, 10542 : 484 - 495
  • [4] Quick-Start and XCP on a Network Processor: Implementation Issues and Performance Evaluation
    Hauger, Simon
    Scharf, Michael
    Koegel, Jochen
    Suriyajan, Chawapong
    2008 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE SWITCHING AND ROUTING (HPSR), 2008, : 45 - 50
  • [5] Implementation and evaluation of a dynamically routed processor operand network
    Gratz, Paul
    Sankaralingam, Karthikeyan
    Hanson, Heather
    Shivakumar, Premkishore
    McDonald, Robert
    Keckler, Stephen W.
    Burger, Doug
    NOCS 2007: FIRST INTERNATIONAL SYMPOSIUM ON NETWORKS-ON-CHIP, PROCEEDINGS, 2007, : 7 - +
  • [6] Design and implementation of a high performance network security processor
    Wang, Haixin
    Bai, Guoqiang
    Chen, Hongyi
    INTERNATIONAL JOURNAL OF ELECTRONICS, 2010, 97 (03) : 309 - 325
  • [7] Performance Modeling of a Network Processor Data Path Using Queuing Systems
    Kolendavelu, Manivannan
    Polisetti, Satish
    Thudt, Raimar
    2009 FIRST INTERNATIONAL CONFERENCE ON COMMUNICATION SYSTEMS AND NETWORKS (COMSNETS 2009), 2009, : 337 - +
  • [8] Design and implementation of Gigabit router using network processor
    Lee, Sang-Woo
    Jeon, Yong-Sung
    Kim, Jeong-Nyeo
    Kim, Ki-Young
    Jang, Jong-Soo
    PROCEEDINGS OF THE NINTH IASTED INTERNATIONAL CONFERENCE ON INTERNET AND MULTIMEDIA SYSTEMS AND APPLICATIONS, 2005, : 32 - 35
  • [9] SMB gateway firewall implementation using a network processor
    Kim S.-H.
    Vedantham S.
    Pathak P.
    Network Security, 2010, 2010 (08) : 10 - 15
  • [10] Performance modelling of a network processor using POOSL
    Theelen, BD
    Voeten, JPM
    Kramer, RDJ
    COMPUTER NETWORKS, 2003, 41 (05) : 667 - 684
12345