A low power density hebbian eigenfilter VLSI for neuro-physiological sensor spike train analysis

Real-time neuro-physiological signal processing with dramatic increasing data bandwidth and data volume comes up against large computation load and power dissipation. For spike train analysis circuit, the trade-off between power density and throughput rate is a significant problem. In this paper, a principle component analysis approach utilizing hebbian eigenfilter for spike train analysis is proposed. An array architecture associated with vector parallel computing function is built to achieve low power density. Experimental result shows that the power density of the hebbian eigenfilter is reduced to 46.1 mu W/mm(2) at the required sample rate and gate count reaches to about 72000.