Total dose testing of 10-bit low voltage differential signal (LVDS) serializer and deserializer

被引：0

作者：

Hamilton, BJ ^{[1
]}

Turflinger, TL ^{[1
]}

机构：

[1] NAVSEA Crane, Technol Dev Branch, Crane, IN 47522 USA

来源：

2001 IEEE RADIATION EFFECTS DATA WORKSHOP, WORKSHOP RECORD | 2001年

关键词：

D O I：

10.1109/REDW.2001.960474

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Commercial deep submicron (< 0.25 micron) CMOS technology exhibits excellent total dose hardness. National Semiconductor LVDS serializer and deserializer circuits, manufactured in this process, were tested to over 115 krd(Si) and 65 krd(Si) respectfully, without failure. Testing proved to challenge traditional test techniques, as these parts ran at parallel data rates up to 40 MHz.

引用

页码：177 / 181

页数：5

共 22 条

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