FPGA HARDWARE DESIGN, SIMULATION AND SYNTHESIS FOR A INDEPENDENT COMPONENT ANALYSIS ALGORITHM USING SYSTEM-LEVEL DESIGN SOFTWARE

In this work we proposed the design, simulation and synthesis of a hardware that performs the Independent Component Analysis (ICA) in a reconfigurable hardware platform, more specifically a FPGA. The simulation of the hardware was done by models implemented in Simulink environment and the synthesis was possible through the Altera system-level design software DSP Builder, that contains specific FPGA blocks that can be synthesized in hardware. In order to validate the hardware, manually generated data and real electroencephalogram signals were used in the experiments.