A high performance top-gate thin film transistor (TFT) has been fabricated using an as-deposited polycrystalline silicon (poly-Si) film by ultrahigh-vacuum chemical vapor deposition (UHV/CVD) followed by chemical mechanical polishing (CMP). In this process, due to the ultraclean environment and very low-pressure deposition of UHV/CVD, high-quality poly-Si films can be obtained and no long-term or post-recrystallization in channel films is needed. Maximum field mobilities of 58 cm(2)/V.s adn 98 cm(2)/V.s for p- and n-channel TFTs, respectively, an ON/OFF current ratio of 1.1 x 10(7) for both p- and n-channels, and threshold voltages of -0.54 V for p-channel and 0.36 V for n-channel, devices, respectively, are achieved. Finally, an analytical model of poly-Si TFTs was used to simulate the gate-voltage-dependent activation energy on the threshold and above the threshold regions and showed good agreement.