A Comparison between Hardware Accelerators for the Modified Tate Pairing over F2m and F3m

被引：0

作者：

Beuchat, Jean-Lue ^{[1
]}

Brisebarre, Nicolas ^{[2
]}

Detrey, Jeremie ^{[3
]}

Okamoto, Eiji ^{[1
]}

Rodriguez-Henriquez, Francisco ^{[4
]}

机构：

[1] Univ Tsukuba, Grad Sch Syst & Informat Engn, 1-1-1 Tennodai, Tsukuba, Ibaraki 3058573, Japan

[2] Ecole Normale Super Lyon, LIP Arenaire, CNRS INRIA UCBL, ENS, F-69364 Lyon, France

[3] Cosec Grp, D-53113 Bonn, Germany

[4] CINVESTAV, IPN, Dept Elect Engn, Comp Sci Sect, MX-07300 Mexico City, DF, Mexico

来源：

PAIRING-BASED CRYPTOGRAPHY - PAIRING 2008 | 2008年 / 5209卷

关键词：

Modified Tate pairing; reduced eta(T) pairing; finite field arithmetic; elliptic curve; hardware accelerator; FPGA;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In this article we propose a study of the modified Tate pairing in characteristics two and three. Starting from the eta(T) pairing introduced by Barreto et al. [1], we detail various algorithmic improvements in the case of characteristic two. As far as characteristic three is concerned, we refer to the survey by Beuchat et al. [5]. We then show how to get back to the modified Tate pairing at almost no extra cost. Finally, we explore the trade-offs involved in the hardware implementation of this pairing for both characteristics two and three. Front our experiments, characteristic three appears to have a slight advantage over characteristic two.

引用

页码：297 / +

页数：4

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