Interconnection of stacked layers by bumpless wiring in wafer-level three-dimensional device

被引:0
|
作者
Satoh, A [1 ]
机构
[1] Sumitomo Heavy Ind Ltd, Ctr Res & Dev, Yokosuka, Kanagawa 2378555, Japan
关键词
bumpless; optical excitation electropolishing method; (OEEM); stacked layers; molten metal suction method; electrocapillary effect;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes the wafer-level, three-dimensional packaging for MEMS in which sensors, actuators, electronic circuits and other functions are combined together in one integrated block. Si wafers with built-in MEMS functions were integrated with no change in thickness to ensure mechanical strength and improve heat dissipation. In the entire process of three-dimensional integration. Si wafers were processed at temperatures below 400 degreesC to prevent degradation of their built-in functions. A description is made of the low-temperature oxidation technology developed by us, which makes through-holes of high density and high aspect ratio in Si wafers with builtin functions by the Optical Excitation Electropolishing Method (OEEM) and forms an oxide film on the hole walls simply by replacing electrolyte. Next. a description is presented of the bumpless interconnection method which fills through-holes of stacked layers with metal by the molten metal suction method and of the electrocapillary effect as a countermeasure to prevent the filler metal from dropping out of holes tinder its own weight.
引用
收藏
页码:1746 / 1755
页数:10
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