共 50 条
- [1] Wafer-level packaging of three-dimensional MOEMS device with lens diaphragm PROCEEDINGS OF THE IEEE TWENTIETH ANNUAL INTERNATIONAL CONFERENCE ON MICRO ELECTRO MECHANICAL SYSTEMS, VOLS 1 AND 2, 2007, : 506 - +
- [2] Review of wafer-level three-dimensional integration (3DI) using bumpless interconnects for tera-scale generation IEICE ELECTRONICS EXPRESS, 2015, 12 (07):
- [3] Wafer-level three-dimensional monolithic integration for heterogeneous silicon ICs 2004 TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, DIGEST OF PAPERS, 2004, : 45 - 48
- [5] Material Optimization of Permanent and Temporary Adhesives for Wafer-level Three-dimensional Integration 2020 IEEE 70TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2020), 2020, : 56 - 61
- [6] Planarization issues in wafer-level three-dimensional (3D) integration ADVANCES IN CHEMICAL-MECHANICAL POLISHING, 2004, 816 : 217 - 228
- [7] Wafer-level three-dimensional hyper-integration technology using dielectric adhesive wafer bonding MATERIALS FOR INFORMATION TECHNOLOGY: DEVICES, INTERCONNECTS AND PACKAGING, 2005, : 405 - 417