New Multi-level Inverter Topology with Reduced Number of Switches

被引：0
|
作者：
Singh, Varsha [1 ]
Babu, Gubbala V. V. Rajendra [1 ]
Singh, V. P. [1 ]
机构：
[1] NIT Raipur, Dept Elect Engn, Raipur 492010, CG, India
来源：
2017 INTERNATIONAL CONFERENCE OF ELECTRONICS, COMMUNICATION AND AEROSPACE TECHNOLOGY (ICECA), VOL 1 | 2017年
关键词：
multi-level inverter (MLI); pulse width modulation (PWM); total harmonic distortion (THD; CONVERTERS;
D O I：
暂无
中图分类号：
V [航空、航天];
学科分类号：
08 ; 0825 ;
摘要：
In this study, a new multilevel inverter topology using modified H bridge with reduced number of switches has been proposed which can be operated in "symmetric" or "asymmetric" modes. Higher number of levels leads to generation of a high quality with low Total Harmonic Distortion (THD) output voltage waveform. To increase number of voltage levels, for determination of magnitude of DC voltage sources three algorithms are proposed which are investigated and the most effective one is introduced. To verify operation of proposed topology, it is modeled and simulated in MATLAB/SIMULINK software as well as in hardware. Proper performance of proposed topology is confirmed by obtained experimental results.
引用
收藏
页码：462 / 467
页数：6
相关论文
共 50 条
  • [1] Design and analysis of a new multi-level inverter topology with a reduced number of switches and controlled by PDPWM technique
    Chakir, Fatima
    EL Magri, Abdelmounime
    Lajouad, Rachid
    Kissaoui, Mohamed
    Chakir, Mostafa
    Bouattane, Omar
    INTERNATIONAL JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING SYSTEMS, 2023, 14 (05) : 593 - 600
  • [2] A new multi-level inverter with reduced number of switches based on modified H-bridge
    Annamalai T.
    Udhayakumar K.
    International Journal of Power Electronics, 2019, 10 (1-2) : 49 - 64
  • [3] Fuzzy Logic Controller for Nine Level Multi-Level Inverter with Reduced Number of Switches
    Madhav, Leela K.
    Babu, Challa
    Ponnambalam, P.
    Mahapatra, Ashutos
    2017 INNOVATIONS IN POWER AND ADVANCED COMPUTING TECHNOLOGIES (I-PACT), 2017,
  • [4] The New Topology of Multilevel Inverter with Reduced Number of Switches
    Jefry, Nur Atiqah
    Haw, Law Kah
    Ing, Wong Kiing
    2020 11TH IEEE CONTROL AND SYSTEM GRADUATE RESEARCH COLLOQUIUM (ICSGRC), 2020, : 94 - 99
  • [5] Trends and Challenges in Multi-Level Inverter with Reduced Switches
    Srinivasan, Ganesh Kumar
    Rivera, Marco
    Loganathan, Vijayaraja
    Ravikumar, Dhanasekar
    Mohan, Balaji
    ELECTRONICS, 2021, 10 (04) : 1 - 23
  • [6] A New Multilevel Inverter Topology with Reduced Number of Power Switches
    Beigi, L. M. A.
    Azli, N. A.
    Khosravi, F.
    Najafi, E.
    Kaykhosravi, A.
    2012 IEEE INTERNATIONAL CONFERENCE ON POWER AND ENERGY (PECON), 2012, : 55 - 59
  • [7] A Multilevel Inverter Topology With Reduced Number of Switches
    Kashif, Muhammad Fayyaz
    Rashid, Amir Khurrum
    2016 INTERNATIONAL CONFERENCE ON INTELLIGENT SYSTEMS ENGINEERING (ICISE), 2016, : 268 - 271
  • [8] Symmetric Multi-Level Boost Inverter with Single DC Source Using Reduced Number of Switches
    Marimuthu, Marikkannu
    Vijayalakshmi, Subramanian
    TEHNICKI VJESNIK-TECHNICAL GAZETTE, 2020, 27 (05): : 1585 - 1591
  • [9] A New Cascaded Multi-level Inverter Topology with Reduced Number of Components and Charge Balance Control Methods Capabilities
    Babaei, Ebrahim
    Laali, Sara
    Bahravar, Sepideh
    ELECTRIC POWER COMPONENTS AND SYSTEMS, 2015, 43 (19) : 2116 - 2130
  • [10] New Single Phase Multilevel Inverter Topology with Reduced Number of Switches
    Malathy, S.
    Ramaprabha, R.
    2016 3RD INTERNATIONAL CONFERENCE ON ELECTRICAL ENERGY SYSTEMS (ICEES), 2016, : 139 - 144
12345