Optimization of analog IC test structures

被引：1
|
作者：
Felt, E [1 ]
SangiovanniVincentelli, A [1 ]
机构：
[1] UNIV CALIF BERKELEY,DEPT ELECT ENGN & COMP SCI,BERKELEY,CA 94720
来源：
14TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS | 1996年
关键词：
D O I：
10.1109/VTEST.1996.510834
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：48 / 53
页数：6
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