A 0.5-V-supply, 37.8-nW, 17.6-ppm/°C switched-capacitor bandgap reference with second-order curvature compensation

被引:6
|
作者
Liu, Yang [1 ]
Li, Bin [1 ]
Chen, Zhaoquan [1 ]
Chen, Zhijian [1 ]
Huang, Mo [1 ]
Lu, Yan [2 ]
机构
[1] South China Univ Technol, Sch Elect & Informat Engn, Guangzhou, Guangdong, Peoples R China
[2] Univ Macau, State Key Lab Analog & Mixed Signal VLSI, Macau, Peoples R China
来源
MICROELECTRONICS JOURNAL | 2019年 / 87卷
基金
中国国家自然科学基金; 对外科技合作项目(国际科技项目);
关键词
Bandgap reference; Switched-capacitor; High order curvature compensation; Ultra-low power; CMOS VOLTAGE REFERENCE; PPM/DEGREES-C; SAR ADC; POWER; NW;
D O I
10.1016/j.mejo.2019.02.017
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a switched-capacitor (SC) bandgap reference (BGR) with second-order curvature compensation for ultra-low power systems. The gate-source voltage of a sub-threshold MOSFET is proposed to implement the second-order curvature compensation voltage in this work. And then, a SC network is used, not only to add the second-order voltage and the first-order one together, but also to fulfill the summing weight effectively and precisely. In this way, the silicon area and power consumption can be reduced simultaneously. Furthermore, the design methodology of summing weight is investigated, and thus the temperature coefficient (TC) can be significantly reduced. The proposed SC-BGR was implemented and simulated in a CMOS 0.18 mu m process, the average output voltage is 426.1 mV, achieving a TC of 17.6 ppm/degrees C from -20 to 100 degrees C under a 0.5 V minimum supply voltage. With the help of the SC architecture, a small chip area of 0.0975 mm(2) is achieved with only 37.8-nW power consumption.
引用
收藏
页码:136 / 143
页数:8
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