Improving the robustness and drift resilience of CMOS BBPLL-based time-based sensor interfaces

Robustness against all variations in power supply, temperature, drift over time, and so on, are extremely important for many of the emerging smart and autonomous applications. An overview is presented of the inherent robustness properties and the design techniques applied to improve the robustness of CMOS time based sensor interfaces using BBPLL based architectures. This is illustrated by means of two application cases: 1) a BBPLL-based capacitive sensor interface that achieves 14-bit resolution using the time-based chopping technique to reduce the effect of 1/f noise; and 2) a fully-differential BBPLL-based resistive-bridge sensor interface that has a very high drift resilience by combining several digitally-assisted design techniques, such as oscillator tuning. The demonstrated robustness together with the small chip area and technology scalability proves that this architecture is very suited for sensing applications.