Level-shifter Free Approach for Multi-VDD SOTB employing Adaptive Vt Modulation for pMOSFET

被引：0

作者：

Usami, Kimiyoshi ^{[1
]}

Kogure, Shunsuke ^{[1
]}

Yoshida, Yusuke ^{[1
]}

Magasaki, Ryo ^{[1
]}

Amano, Hideharu ^{[2
]}

机构：

[1] Shibaura Inst Technol, Koto Ku, 3-7-5 Toyosu, Tokyo 1358548, Japan

[2] Keio Univ, Kouhoku Ku, 3-14-1 Hiyoshi, Yokohama, Kanagawa 2238522, Japan

来源：

2017 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) | 2017年

关键词：

level shifter; multi-VDD; body bias control; SOTB;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes a level-shifter free (LSF) approach for multi-V-DD design to employ a combination of body bias control and a superior threshold-voltage (Vt) modulation capability of SOTB (Silicon on Thin BOX) devices. We applied this approach to a microprocessor test chip with low-voltage (VDDL) and high-voltage (VDDH) domains, and fabricated it in a 65nm SOTB technology. Measurement results demonstrated that the chip correctly operates at VDDL=0.6V and VDDH=1.2V under the reverse-body-bias (RBB) of 2V for pMOS transistors in the VDDH domain while suppressing the static dc current.

引用

页数：3

共 2 条

[1] Level-shifter-less Approach for Multi-VDD Design to use Body Bias Control in FD-SOI
Usami, Kimiyoshi
Kogure, Shunsuke
Yoshida, Yusuke
Magasaki, Ryo
Amano, Hideharu
2017 IFIP/IEEE INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2017, : 118 - 123
[2] Level-Shifter-Less Approach for Multi-VDD SoC Design to Employ Body Bias Control in FD-SOI
Usami, Kimiyoshi
Kogure, Shunsuke
Yoshida, Yusuke
Magasaki, Ryo
Amano, Hideharu
VLSI-SOC: OPPORTUNITIES AND CHALLENGES BEYOND THE INTERNET OF THINGS, 2019, 500 : 1 - 21

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