A DC-coupled 1.2 μW 0.012 mm2 per channel neural amplifiers array with 75 dB system common mode rejection ratio and 300 mV common mode interference

被引：3

作者：

Wang, Quan ^{[1
]}

You, Changhua ^{[2
]}

Xue, Ning ^{[2
]}

Zhang, Xuan ^{[3
]}

Feng, Chengcong ^{[4
]}

Zhao, Zhengtuo ^{[4
]}

Yao, Lei ^{[5
,6
]}

Li, Tie ^{[1
]}

机构：

[1] Chinese Acad Sci, Shanghai Inst Microsyst & Informat Technol, Shanghai, Peoples R China

[2] Chinese Acad Sci, Aerosp Informat Res Inst AIR, State Key Lab Transducer Technol, Beijing, Peoples R China

[3] Shanghai Mtrix Technol Co Ltd, Shanghai, Peoples R China

[4] Chinese Acad Sci, CAS Ctr Excellence Brain Sci & Intelligence Techn, Inst Neurosci, State Key Lab Neurosci, Shanghai, Peoples R China

[5] Lingang Lab, Shanghai, Peoples R China

[6] Shanghai Univ, Shanghai, Peoples R China

来源：

ELECTRONICS LETTERS | 2022年 / 58卷 / 23期

基金：

国家重点研发计划;

关键词：

Animals - Electric inverters;

D O I：

10.1049/ell2.12643

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

System common mode rejection ratio (SCMRR) and common mode interference (CMI) range are two critical design specifications for multiple-channel neural recording front-end circuit in a freely moving animal experiment environment. This letter presents a neural amplifiers array consisting of 15 DC-coupled inverter-based recording channels, a reference channel and a shared voltage averaging circuit (VAC) with floating rail Common Mode Feedback (CMFB) to achieve high SCMRR and large CMI range. Meanwhile, power consumption and area are optimized through using simple inverter architecture and removal of the conventional on-chip AC-coupled capacitors. The proposed neural amplifier circuit is implemented in SMIC standard 0.18 mu m CMOS process, achieving a typical 75 dB SCMRR (DC-80 Hz), 300 mV CMI range, 1.2 mu W power consumption and 0.012 mm(2) area per channel. The circuit is validated both by bench-top test and in-vivo animal experiment.

引用

页码：876 / 878

页数：3