Design of energy-efficient circuits and systems using tunnel field effect transistors

被引:7
|
作者
Mukundrajan, Ravindhiran [1 ]
Cotter, Matthew [1 ]
Bae, Sungmin [1 ]
Saripalli, Vinay [1 ]
Irwin, Mary Jane [1 ]
Datta, Suman [2 ]
Narayanan, Vijaykrishnan [1 ]
机构
[1] Penn State Univ, Dept Comp Sci & Engn, University Pk, PA 16802 USA
[2] Penn State Univ, Dept Elect Engn, University Pk, PA 16802 USA
基金
美国国家科学基金会;
关键词
adders; field programmable gate arrays; MOSFET; tunnel transistors; energy-efficient circuit design; tunnel field effect transistors; mobile computing systems; ubiquitous computing systems; battery life; CMOS limitations; metal oxide semiconductor field effect transistor replacement device; TFET; tunnel FET; design abstraction level; field programmable gate array; sparse prefix tree adder; energy reduction;
D O I
10.1049/iet-cds.2012.0387
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Energy efficiency is considered to be the most critical design parameter for ubiquitous and mobile computing systems. With consumers expecting improved functionality and performance from these systems without compromising on battery life, there is urgent need to explore emerging technologies that can overcome the limitations of CMOS and deliver greater energy efficiency. The potential of one such prospective metal oxide semiconductor field effect transistor replacement device, the tunnel FET (TFET), is evaluated in this study. Novel circuit designs are presented to overcome unique design challenges posed by TFETs. Further, the impact of TFETs at different levels of design abstraction is characterised by evaluating a novel sparse prefix tree adder and a field programmable gate array. A considerable improvement in delay and significant reduction in energy is observed because of the combined impact of circuit and technology co-exploration.
引用
收藏
页码:294 / 303
页数:10
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