moreMCU: A Runtime-reconfigurable RISC-V Platform for Sustainable Embedded Systems

被引:0
|
作者
Scheipel, Tobias [1 ]
Angermair, Florian [1 ]
Baunach, Marcel [1 ]
机构
[1] Graz Univ Technol, Inst Tech Informat, Graz, Austria
关键词
dynamic partial reconfiguration; embedded systems; processor architecture; operating system; hardware software co-design; RISC-V;
D O I
10.1109/DSD57027.2022.00013
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
As the number of embedded systems continues to grow, so does the amount of disposed electronic devices. This is mainly due to partially or fully outdated hardware, caused by new legal regulations in jurisdiction or cutting-edge features within a new generation of devices or hardware components. As most devices are designed without having long-term maintainability in mind and can be easily replaced without much monetary effort, it is often easier to dispose of them. This throw-away mentality, however, increases the carbon footprint enormously. Within this work, we propose a platform that can be used to design future embedded systems in a more sustainable way by preparing them for long-term hardware adaptations. To do so, we aim to make logic updatable and re-usable while the device stays operational. This is achieved by carefully co-designing an operating system and a microcontroller platform with reconfigurable logic. In this paper, we use a RISC-V-based microcontroller running on a field-programmable gate array. The said microcontroller is designed to feature a modular pipeline and replaceable on-chip peripherals alongside a partial reconfiguration controller that can hot-swap parts of the microcontroller while it is running. It is supported by an operating system that handles the reconfiguration as well as functionality emulation, in case it is not (yet) available in hardware. Both the hardware and the software are aware of each other and can manipulate shared data structures for the management of the reconfiguration concept. The experimental evaluation that was carried out on a Artix-7 device shows the proper operation alongside performance measurements and resource utilization of the on-the-fly reconfiguration of a proof-of-concept system without affecting the execution of the remainder of the system.
引用
收藏
页码:24 / 31
页数:8
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