Isotropic Silicon Etching With XeF2 Gas for Wafer-Level Micromachining Applications

被引:31
|
作者
Xu, Dehui [1 ]
Xiong, Bin [1 ]
Wu, Guoqiang [1 ]
Wang, Yuchen [2 ]
Sun, Xiao [1 ]
Wang, Yuelin [1 ]
机构
[1] Chinese Acad Sci, Sci & Technol Microsyst Lab, State Key Lab Transducer Technol, Shanghai Inst Microsyst & Informat Technol, Shanghai 200050, Peoples R China
[2] Peking Univ, Dept Microelect, Beijing 100871, Peoples R China
关键词
Design rule; isotropic etching; microelectromechanical systems (MEMS); micromachining; wafer level; XeF2; gas; APERTURE SIZE; SIMULATION;
D O I
10.1109/JMEMS.2012.2209403
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Wafer-level isotropic etching of silicon with XeF2 gas has been investigated for microelectromechanical-system (MEMS) fabrication. Because of the large exposed silicon area in the wafer-level process, XeF2 gas diffusion in the wafer-level process is different from the chip-level process. The silicon etch rate for the wafer-level XeF2 process is much smaller than chip-level XeF2 etching. Additionally, the silicon etch rate drops off as the etching time increased. The aperture size effect is apparent in the wafer-level XeF2 processing. However, for etching windows with a large size, the aperture size effect will be minimized. Both vertical and lateral aperture size effects depend on the number of etch cycle. Although slight anisotropy is also observed, wafer-level XeF2 etching shows a better isotropy than the chip-level process. Compared with the chip-level process, wafer-level XeF2 etching shows a large etch rate for SiO2. The etch selectivity between silicon and SiO2 is lower than 1000:1. Based on the characteristics of XeF2 etching, the layout design rule for the MEMS device with XeF2 releasing is developed and demonstrated. [2011-0244]
引用
收藏
页码:1436 / 1444
页数:9
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