Comprehensive study on reliability of low-temperature poly-Si thin-film transistors under dynamic complimentary metal-oxide semiconductor operations

The reliability of low-temperature poly-Si under dynamic CMOS operations was evaluated for n-channel (n-ch) and p-channel (p-ch) thin film transistors (TFTs) comprehensively. A decrease in the mobility and the ON current was observed under dynamic stress in the n-ch TFT. However, the mobility and the ON current increased for the p-ch TFT. We found that degradation depends strongly on transition time (rising time and falling time) and frequency for both types. Based on these findings, degradation was found to be induced by a high electric field during pulse fall for the n-ch and pulse rise for the p-ch TFT. A comprehensive degradation model was discussed, When the gate voltage changes to the OFF state, carriers in the channel move rapidly to the source and drain. They gain energy from this electric field and become hot carriers. They form electron traps at the grain boundaries around the drain edge.