Compact Switched-Capacitor Power Detector With Frequency Compensation in 65-nm CMOS

被引:3
|
作者
Li, Chenyang [1 ]
Boon, Chirn Chye [1 ]
Yi, Xiang [2 ]
Liang, Zhipeng [3 ]
Yang, Kaituo [1 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, VIRTUS Lab, Singapore 639798, Singapore
[2] MIT, Dept Elect Engn & Comp Sci, Cambridge, MA 02139 USA
[3] Bantian Huawei Base, Shenzhen 518129, Guangdong, Peoples R China
来源
IEEE ACCESS | 2020年 / 8卷 / 08期
基金
新加坡国家研究基金会;
关键词
CMOS power detector; dynamic range; frequency compensation; self-biased MOSFET;
D O I
10.1109/ACCESS.2020.2974514
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This work presents a compact switched-capacitor power detector (PD) with frequency compensation technique in a 65-nm CMOS process. Utilizing self-biased MOSFET as switches, the PD works both at the positive and the negative cycle to increase the dynamic range (DR). The output of traditional power detectors usually change with the variations of input frequencies which make the measurement of PD more difficult. In this design, by adding a feed-forward frequency detection circuit, the load resistors of the power detector are changed according to the input frequencies. Thus, the effect of input frequency variation is minimized. The measured operation frequency of the power detector is from 3 GHz to 5 GHz with a dynamic range of 20 dB with an error of +/- 2 dB. The variations of the output voltage are reduced from more than 4 dB to +/- 0.5 dB, achieving a variation of less than +/- 0.25 dB/GHz. To the authors' knowledge, it is the first power detector with input frequency compensation. The core of the power detector occupies an area of 0.014 mm(2) and consumes 2.04mW static power.
引用
收藏
页码:34197 / 34203
页数:7
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